The study items are listed on the Open Source CPUs post, especially the category description.
This is another well know GPL processor. With great resources and specific model for commercial use. The cpu is a 32bit SPARC V8 with caches, MMU and other high end features, I think it’s configurable enough to fall into my portable CPU category.
It uses a BSD license for the HDL and a GPL for documentation, architecture and tools. Interesting choice to allow commercial hardware… Well let’s look into it: The ZPU is a zero operand, or stack based CPU, 32bit datapath, 8bit instruction set. As for the category, it looks like an embedded CPU, however the presentation claims it’s not targeted for running uCLinux, also remembering why Navré (see previous post on the topic) was started, ZPU is probably not powerful enough for this class, so it will be a tiny micro-controller.
The AEMB instruction set is taken from Xilinx MicroBlase. The gcc toolchain is the one for the MicroBlase from xilinx, it does not look like it is in mainstream gcc. The AEMB license is GPL v3, it’s in beta state according to it’s page on opencores. It’s a 32bit RISC cpu, apparently able to run uCLinux, so it’s an embedded CPU.
There in an other project page on opencores (with no files) OpenFire.
The project looks stopped…
It’s another clone of the MicroBlase. It uses MIT license, so it’s free.
To stay in xilinx cloned material. This is a rewritten PicoBlase implementation in modified BSD license. The project looks stopped (no update since may 2007).
It’s an 8bit micro-controller, the project also release an assembler for it KCAsm, It does not looks like there is any gcc available here. So we have yet another tiny micro-controller.
I don’t know if this is still relevant but the obsolete page states the following:
If you’re brave enough, you can attempt to create a C compiler for YASEP, but this is a bit sarcastic. If you want to lose time, port GCC. But YASEP’s architecture does not suit C nor GCC well. In fact YASEP is designed to be programmed in assembly language, which is quite simple thanks to a barebone RISC approach. YASEP is a microcontroller, after all.
So gcc will probably never come for this CPU.
I see this project more like an architecture research than a really usable CPU, if you can’t write C at least for generic non over-optimized code, then it’s hard to port any existing software to it without much effort.
It also fall in the tiny micro-controller category.
This comes with a GPL 2 license text but all cpu86 design files refer to LGPL 2,1+ in their headers… The CPU86 core is binary/instruction compatible with an iAPX8088 processor.
It’s probably only useful to update the hardware of a legacy system using 8088 CPU where nobody is able/willing to update the code that runs on it.
Well this don’t fit my categories 😉
The goal of this project seams to rebuild a PC with open source hardware. It’s licensed under GPL version 3. It’s recent, and only implementing 16bit modes (ie 8088/80186).
This one also don’t really suit well with my categories…
So I’m done with the CPU currently listed on wikipedia’s soft microprocessor page.
As usual the summary table is there: Open Cpu Study Summary.