diff options
author | Eric Anholt <anholt@freebsd.org> | 2004-09-19 10:57:31 +0000 |
---|---|---|
committer | Eric Anholt <anholt@freebsd.org> | 2004-09-19 10:57:31 +0000 |
commit | 90ff3688cdc0c2c1b5ccdbd9cc0659b9a355e85f (patch) | |
tree | 92eafca3d1f94aed4f32d478a3b61480b41777d8 /hw/kdrive/ati | |
parent | 9297c6149f83de22395503c484a2ca65dbffaf6b (diff) |
Unbreak the AGP DRI case. That was quite a pile of broken code.
Diffstat (limited to 'hw/kdrive/ati')
-rw-r--r-- | hw/kdrive/ati/ati_dri.c | 72 | ||||
-rw-r--r-- | hw/kdrive/ati/ati_reg.h | 33 |
2 files changed, 54 insertions, 51 deletions
diff --git a/hw/kdrive/ati/ati_dri.c b/hw/kdrive/ati/ati_dri.c index 2301258d0..48afbd2f0 100644 --- a/hw/kdrive/ati/ati_dri.c +++ b/hw/kdrive/ati/ati_dri.c @@ -241,13 +241,8 @@ ATIDRIAgpInit(ScreenPtr pScreen) unsigned char *mmio = atic->reg_base; unsigned long mode; int ret; - unsigned long agpBase; CARD32 cntl, chunk; - /* AGP DRI seems broken on my R128, not sure why. */ - if (!atic->is_radeon) - return FALSE; - if (drmAgpAcquire(atic->drmFd) < 0) { ErrorF("[agp] AGP not available\n"); return FALSE; @@ -255,30 +250,21 @@ ATIDRIAgpInit(ScreenPtr pScreen) ATIDRIInitGARTValues(pScreen); - /* Modify the mode if the default mode is not appropriate for this - * particular combination of graphics card and AGP chipset. - */ - - /* XXX: Disable fast writes? */ - mode = drmAgpGetMode(atic->drmFd); - if (mode > 4) - mode = 4; - /* Set all mode bits below the chosen one so fallback can happen */ - mode = (mode * 2) - 1; + if (atic->is_radeon) { + mode &= ~RADEON_AGP_MODE_MASK; + mode |= RADEON_AGP_1X_MODE; + } else { + mode &= ~R128_AGP_MODE_MASK; + mode |= R128_AGP_1X_MODE; + } if (drmAgpEnable(atic->drmFd, mode) < 0) { ErrorF("[agp] AGP not enabled\n"); drmAgpRelease(atic->drmFd); return FALSE; } - - /* Workaround for some hardware bugs */ - if (atic->is_r100) { - cntl = MMIO_IN32(mmio, ATI_REG_AGP_CNTL); - MMIO_OUT32(mmio, ATI_REG_AGP_CNTL, cntl | - RADEON_PENDING_SLOTS_VAL | RADEON_PENDING_SLOTS_SEL); - } + ErrorF("[agp] Mode 0x%08x selected\n", drmAgpGetMode(atic->drmFd)); if ((ret = drmAgpAlloc(atic->drmFd, atis->gartSize * 1024 * 1024, 0, NULL, &atis->agpMemHandle)) < 0) { @@ -317,27 +303,29 @@ ATIDRIAgpInit(ScreenPtr pScreen) (drmAddressPtr)&atis->gartTex, "AGP texture map")) return FALSE; - /* Initialize radeon/r128 AGP registers */ - cntl = MMIO_IN32(mmio, ATI_REG_AGP_CNTL); - cntl &= ~ATI_AGP_APER_SIZE_MASK; - switch (atis->gartSize) { - case 256: cntl |= ATI_AGP_APER_SIZE_256MB; break; - case 128: cntl |= ATI_AGP_APER_SIZE_128MB; break; - case 64: cntl |= ATI_AGP_APER_SIZE_64MB; break; - case 32: cntl |= ATI_AGP_APER_SIZE_32MB; break; - case 16: cntl |= ATI_AGP_APER_SIZE_16MB; break; - case 8: cntl |= ATI_AGP_APER_SIZE_8MB; break; - case 4: cntl |= ATI_AGP_APER_SIZE_4MB; break; - default: - ErrorF("[agp] Illegal aperture size %d kB\n", atis->gartSize * - 1024); + if (atic->is_r100) { + /* Workaround for some hardware bugs */ + cntl = MMIO_IN32(mmio, ATI_REG_AGP_CNTL); + MMIO_OUT32(mmio, ATI_REG_AGP_CNTL, cntl | + RADEON_PENDING_SLOTS_VAL | RADEON_PENDING_SLOTS_SEL); + } else if (!atic->is_radeon) { + cntl = MMIO_IN32(mmio, ATI_REG_AGP_CNTL); + cntl &= ~R128_AGP_APER_SIZE_MASK; + switch (atis->gartSize) { + case 256: cntl |= R128_AGP_APER_SIZE_256MB; break; + case 128: cntl |= R128_AGP_APER_SIZE_128MB; break; + case 64: cntl |= R128_AGP_APER_SIZE_64MB; break; + case 32: cntl |= R128_AGP_APER_SIZE_32MB; break; + case 16: cntl |= R128_AGP_APER_SIZE_16MB; break; + case 8: cntl |= R128_AGP_APER_SIZE_8MB; break; + case 4: cntl |= R128_AGP_APER_SIZE_4MB; break; + default: + ErrorF("[agp] Illegal aperture size %d kB\n", atis->gartSize * + 1024); return FALSE; - } - agpBase = drmAgpBase(atic->drmFd); - MMIO_OUT32(mmio, ATI_REG_AGP_BASE, agpBase); - MMIO_OUT32(mmio, ATI_REG_AGP_CNTL, cntl); + } + MMIO_OUT32(mmio, ATI_REG_AGP_CNTL, cntl); - if (!atic->is_radeon) { /* Disable Rage 128 PCIGART registers */ chunk = MMIO_IN32(mmio, R128_REG_BM_CHUNK_0_VAL); chunk &= ~(R128_BM_PTR_FORCE_TO_PCI | @@ -349,6 +337,8 @@ ATIDRIAgpInit(ScreenPtr pScreen) MMIO_OUT32(mmio, R128_REG_PCI_GART_PAGE, 1); } + MMIO_OUT32(mmio, ATI_REG_AGP_BASE, drmAgpBase(atic->drmFd)); + return TRUE; } diff --git a/hw/kdrive/ati/ati_reg.h b/hw/kdrive/ati/ati_reg.h index 17cd4bef5..b0e0019fb 100644 --- a/hw/kdrive/ati/ati_reg.h +++ b/hw/kdrive/ati/ati_reg.h @@ -104,16 +104,16 @@ #define ATI_REG_AGP_BASE 0x0170 #define ATI_REG_AGP_CNTL 0x0174 -# define ATI_AGP_APER_SIZE_256MB (0x00 << 0) -# define ATI_AGP_APER_SIZE_128MB (0x20 << 0) -# define ATI_AGP_APER_SIZE_64MB (0x30 << 0) -# define ATI_AGP_APER_SIZE_32MB (0x38 << 0) -# define ATI_AGP_APER_SIZE_16MB (0x3c << 0) -# define ATI_AGP_APER_SIZE_8MB (0x3e << 0) -# define ATI_AGP_APER_SIZE_4MB (0x3f << 0) -# define ATI_AGP_APER_SIZE_MASK (0x3f << 0) -#define RADEON_PENDING_SLOTS_VAL 0x00060000 -#define RADEON_PENDING_SLOTS_SEL 0x00080000 +# define R128_AGP_APER_SIZE_256MB (0x00 << 0) +# define R128_AGP_APER_SIZE_128MB (0x20 << 0) +# define R128_AGP_APER_SIZE_64MB (0x30 << 0) +# define R128_AGP_APER_SIZE_32MB (0x38 << 0) +# define R128_AGP_APER_SIZE_16MB (0x3c << 0) +# define R128_AGP_APER_SIZE_8MB (0x3e << 0) +# define R128_AGP_APER_SIZE_4MB (0x3f << 0) +# define R128_AGP_APER_SIZE_MASK (0x3f << 0) +# define RADEON_PENDING_SLOTS_VAL 0x00060000 +# define RADEON_PENDING_SLOTS_SEL 0x00080000 #define R128_REG_PCI_GART_PAGE 0x017c @@ -294,9 +294,22 @@ # define ATI_CAP_ID_NULL 0x0000 /* End of capability list */ # define ATI_CAP_ID_AGP 0x0002 /* AGP capability ID */ +#define R128_REG_AGP_STATUS 0x0f54 /* PCI */ +# define R128_AGP_1X_MODE 0x01 +# define R128_AGP_2X_MODE 0x02 +# define R128_AGP_4X_MODE 0x04 +# define R128_AGP_MODE_MASK 0x07 + #define R128_REG_AGP_COMMAND 0x0f58 # define R128_AGP_ENABLE (1 << 8) +#define RADEON_REG_AGP_STATUS 0x0f5c /* PCI */ +# define RADEON_AGP_1X_MODE 0x01 +# define RADEON_AGP_2X_MODE 0x02 +# define RADEON_AGP_4X_MODE 0x04 +# define RADEON_AGP_FW_MODE 0x10 +# define RADEON_AGP_MODE_MASK 0x17 + #define RADEON_REG_AGP_COMMAND 0x0f60 # define RADEON_AGP_ENABLE (1 << 8) |