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		<title>scaleway on Silicone&#39;s web</title>
		<link>https://silicone.homelinux.org/tags/scaleway/</link>
		<description>Recent content in scaleway on Silicone&#39;s web</description>
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			<lastBuildDate>Wed, 03 Oct 2018 21:30:22 +0100</lastBuildDate>
		
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				<title>Inside an Open Source BIOS</title>
				<link>https://silicone.homelinux.org/2018/04/11/inside-an-open-source-bios/</link>
				<pubDate>Wed, 11 Apr 2018 12:00:37 +0100</pubDate>
				<guid>https://silicone.homelinux.org/2018/04/11/inside-an-open-source-bios/</guid>
				<description>&lt;p&gt;&lt;em&gt;This post was originally published as &lt;a title=&#34;A look from behind the Open Source Bios&#34; href=&#34;https://blog.online.net/2018/04/10/a-look-from-behind-the-open-source-bios/&#34; target=&#34;_blank&#34;&gt;A look from behind the Open Source Bios&lt;/a&gt; on Scaleway’s blog.&lt;/em&gt;&lt;/p&gt;&#xA;&lt;p&gt;This is a followup post of &lt;a href=&#34;http://silicone.homelinux.org/2018/03/16/open-source-bios-at-scale/&#34; title=&#34;Open Source Bios at Scale&#34;&gt;Open Source Bios at Scale&lt;/a&gt; so you might what to read it first as this post will get more into details.&lt;/p&gt;&#xA;&lt;p&gt;As explained in the previous post our BIOS is build with three main components: &lt;a href=&#34;https://www.coreboot.org/&#34; rel=&#34;nofollow&#34;&gt;coreboot&lt;/a&gt;, Intel FSP and &lt;a href=&#34;http://www.tianocore.org/&#34; rel=&#34;nofollow&#34;&gt;TianoCore&lt;/a&gt;. We will describe here how those three parts are fitting together.&lt;/p&gt;</description>
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				<title>Open Source Bios at Scale</title>
				<link>https://silicone.homelinux.org/2018/03/16/open-source-bios-at-scale/</link>
				<pubDate>Fri, 16 Mar 2018 12:00:02 +0100</pubDate>
				<guid>https://silicone.homelinux.org/2018/03/16/open-source-bios-at-scale/</guid>
				<description>&lt;p&gt;&lt;em&gt;This post is a summary of &lt;a title=&#34;Open Source Bios at Scale&#34; href=&#34;https://fosdem.org/2018/schedule/event/hwenablement_open_source_bios_at_scale/&#34; target=&#34;_blank&#34;&gt;my talk at FOSDEM’18&lt;/a&gt; and was originally posted on &lt;a title=&#34;Open Source Bios at Scale&#34; href=&#34;https://blog.online.net/2018/03/15/open-source-bios-at-scale/&#34; target=&#34;_blank&#34;&gt;Scaleway’s blog&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;&#xA;&lt;p&gt;At &lt;a href=&#34;https://scaleway.com&#34; rel=&#34;nofollow&#34;&gt;Scaleway&lt;/a&gt; we started to design our servers with the &lt;a href=&#34;https://www.scaleway.com/baremetal-cloud-servers&#34; rel=&#34;nofollow&#34;&gt;ARM C1&lt;/a&gt;.&lt;br&gt;&#xA;Later we switched to a x86 architecture to provide the &lt;a href=&#34;https://www.scaleway.com/baremetal-cloud-servers/&#34; rel=&#34;nofollow&#34;&gt;C2&lt;/a&gt; and &lt;a href=&#34;https://www.online.net/fr/serveur-dedie/dedibox-sc&#34; rel=&#34;nofollow&#34; hreflang=&#34;fr&#34;&gt;Dedibox SC2016&lt;/a&gt;.&lt;/p&gt;&#xA;&lt;p&gt;On x86 a BIOS is required to start the server. BIOS software got many legacy and backward compatible software to ensure a reliable behavior across many boards. I was in charge of the BIOS development for our new generation of x86 servers.&lt;/p&gt;&#xA;&lt;p&gt;This article presents technical choices we used during our development.&lt;/p&gt;</description>
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